x86/vlapic: express x2apic msr readability with a bitmap
authorAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 22 Jan 2015 11:59:14 +0000 (12:59 +0100)
committerJan Beulich <jbeulich@suse.com>
Thu, 22 Jan 2015 11:59:14 +0000 (12:59 +0100)
commitdf39f487cc646774af130b856066c3c6538a0dc9
treebb273f734013ba975c4dfe156d85de99ffec311d
parent2e6fc2db9f1231e2ed0ec5263c6aa6ff1db90c5f
x86/vlapic: express x2apic msr readability with a bitmap

The x2apic MSR space is currently defined between 0x800 and 0x83f, which
conveniently fits in a 64 bit wide bitmap.  This is far more efficient than
the cascade comparisons generated by the switch statement, which can't be
optimised because of the case ranges used for the ISR, TMR and IRR blocks.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Convert 0xffUL to ((1UL << (NR_VECTORS / 32)) - 1) and drop a couple of
clearly superfluous parentheses.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/vlapic.c